# Analog IC Design: Course Plan

Analog IC Design: Course Plan

## Day

Day

## Lecture (3 h/day)

Lecture (3 h/day)

## Lab (3 h/day)

Lab (3 h/day)

## 1

1

**Lecture 01: Introduction**

**Lecture 01: Introduction**

**Lecture 02: Circuits and systems review**

**Lecture 02: Circuits and systems review**

**Lecture 03: Semiconductors review**

**Lecture 03: Semiconductors review**

**Lab 01 (Part 1): Basic simulations of RC circuit**

**Lab 01 (Part 1): Basic simulations of RC circuit**

### Transient simulation, AC simulation, pole-zero simulation, parametric sweeps, calculator and expressions

Transient simulation, AC simulation, pole-zero simulation, parametric sweeps, calculator and expressions

## 2

2

### Lecture 04: MOSFET large signal model

Lecture 04: MOSFET large signal model

### Lecture 05: MOSFET small signal model

Lecture 05: MOSFET small signal model

### Lab 01 (Part 2): MOSFET long channel and short channel characteristics

Lab 01 (Part 2): MOSFET long channel and short channel characteristics

### DC sweeps, ID-VGS, gm-VGS, ID-VDS, gm and gds in triode and saturation

DC sweeps, ID-VGS, gm-VGS, ID-VDS, gm and gds in triode and saturation

## 3

3

### Lecture 06: Single-stage CMOS amplifiers

Lecture 06: Single-stage CMOS amplifiers

### Lecture 07: Cascode amplifiers

Lecture 07: Cascode amplifiers

**Lab 02: Common-source amplifier**

**Lab 02: Common-source amplifier**

### Creating design charts, OP simulation, gain non-linearity, maximum attainable gain, gain linearization

Creating design charts, OP simulation, gain non-linearity, maximum attainable gain, gain linearization

## 4

4

### Lecture 08: Frequency response (1)

Lecture 08: Frequency response (1)

### Lecture 09: Frequency response (2)

Lecture 09: Frequency response (2)

### Lab 03: Cascode amplifier

Lab 03: Cascode amplifier

### Cascode with active load, cascode with resistive load, effect of cascode on gain, BW, and GBW

Cascode with active load, cascode with resistive load, effect of cascode on gain, BW, and GBW

## 5

5

**Lecture 10: Current mirrors**

**Lecture 10: Current mirrors**

**Lab 04: Frequency response of CD buffer**

**Lab 04: Frequency response of CD buffer**

### Complex poles, frequency-domain peaking, time-domain ringing, inductive rise

Complex poles, frequency-domain peaking, time-domain ringing, inductive rise

## 6

6

### Lecture 11: Differential amplifier

Lecture 11: Differential amplifier

### Lab 05: Current mirrors

Lab 05: Current mirrors

### Simple current mirror, cascode current mirror, wide-swing (low-compliance) current mirror

Simple current mirror, cascode current mirror, wide-swing (low-compliance) current mirror

## 7

7

**Lecture 12: Five-transistor OTA**

**Lecture 12: Five-transistor OTA**

**Lecture 13: Gm/ID design methodology**

**Lecture 13: Gm/ID design methodology**

**Lab 06: Differential amplifier**

**Lab 06: Differential amplifier**

### Differential gain, common-mode gain, CMRR, common-mode input range, large signal operation

Differential gain, common-mode gain, CMRR, common-mode input range, large signal operation

## 8

8

### Lecture 14: OTA design example

Lecture 14: OTA design example

### Lab 07: OTA design

Lab 07: OTA design

### Gm/ID design charts, design procedure of five-transistor OTA, open-loop simulation, closed-loop simulation

Gm/ID design charts, design procedure of five-transistor OTA, open-loop simulation, closed-loop simulation

## 9

9

**Lecture 15: Negative feedback**

**Lecture 15: Negative feedback**

### Lab 07: OTA design

Lab 07: OTA design

### (continued)

(continued)

## 10

10

### Lecture 16: OTA stability and compensation

Lecture 16: OTA stability and compensation

**Lab 08: Negative feedback **

**Lab 08: Negative feedback**

### Behavioral modeling, hierarchy editor, effect of feedback on gain/BW/GBW, open-loop gain, closed-loop gain, loop-gain, gain desensitization

Behavioral modeling, hierarchy editor, effect of feedback on gain/BW/GBW, open-loop gain, closed-loop gain, loop-gain, gain desensitization

## 11

11

**Lecture 17: Noise (1)**

**Lecture 17: Noise (1)**

**Lecture 18: Noise (2)**

**Lecture 18: Noise (2)**

### Lab 09 (Mini Project 01): Two-stage Miller OTA

Lab 09 (Mini Project 01): Two-stage Miller OTA

### Design procedure of two-stage Miller OTA, frequency compensation, RHP zero, verification

Design procedure of two-stage Miller OTA, frequency compensation, RHP zero, verification

## 12

12

### Lecture 19: OTA topologies

Lecture 19: OTA topologies

### Lab 09 (Mini Project 01): Two-stage Miller OTA

Lab 09 (Mini Project 01): Two-stage Miller OTA

### (continued)

(continued)

## 13

13

**Lecture 20: Common-mode feedback (CMFB)**

**Lecture 20: Common-mode feedback (CMFB)**

**Lab 10: Noise simulation**

**Lab 10: Noise simulation**

### AC noise simulation, transient noise simulation, noise in five-transistor OTA

AC noise simulation, transient noise simulation, noise in five-transistor OTA

## 14

14

### Lecture 21: Slew rate and PSRR

Lecture 21: Slew rate and PSRR

### Lecture 22: Variability and mismatch

Lecture 22: Variability and mismatch

### Lab 11 (Mini Project 02): Fully differential folded cascode OTA

Lab 11 (Mini Project 02): Fully differential folded cascode OTA

### Design of folded cascode OTA with capacitive feedback, behavioral and actual CMFB network

Design of folded cascode OTA with capacitive feedback, behavioral and actual CMFB network

## 15

15

**Lecture 23: Biasing and references**

**Lecture 23: Biasing and references**

### Lab 11 (Mini Project 02): Fully differential folded cascode OTA

Lab 11 (Mini Project 02): Fully differential folded cascode OTA

### (continued)

(continued)

## What Students Say About This Course

What Students Say About This Course